1. Xilinx, “Platform Studio and the EDK”, on-line at http://www.xilinx.com/ise/embedded_design_prod/platform_studio.htm , last viewed on October 2008.
2. Altera, “Introduction to SoPC Builder”, on-line at http://www.altera.com/literature/hb/qts/qts_qii54001.pdf , May 2008, from Quartus II Handbook, last viewed on October 2008.
3. SystemVerilog, "IEEE Std. 1800–2005: IEEE Standard for SystemVerilog - Unified Hardware Design, Specification, and Verification Language", IEEE, 3 Park Avenue, NY, 2005.
4. R. Dömer, D.D. Gajski and A. Gerstlauer, "SpecC Methodology for High-Level Modeling", 9th IEEE/DATC Electronic Design Processes Workshop, 2002.
5. C.R. Clare, Designing Logic Systems Using State Machines, McGraw-Hill, New-York, 1973.