Harmonic analysis of CMOS low noise amplifier with employing PMOS IMD technique for biosensor applications
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s00542-023-05466-1.pdf
Reference80 articles.
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2. Aparin V, Brown G, Larson LE (2004) Linearization of CMOS LNAs via optimum gate biasing Proc. IEEE Int. Circuits Syst. Symp. Vancouver, BC, Canada 4:748–751
3. AparinV LLE (2005) Modified derivative superposition method for linearizing FET low-noise amplifiers IEEE Trans. Microw Theorytech 53:571–581
4. Asgaran S, Jamal DM (2007) Design of the input matching network of RF CMOSLNAs for low-power operation. IEEE Trans Circuits Syst I 54:544–554
5. Bhargava P, Hairston WD, Proie RM (2014) A 262nW analog front end with a digitally-assisted low noise amplifier for batteryless EEG acquisition. Subthreshold Microelect Technol Unified Conf. https://doi.org/10.1109/S3S.2014.7028247
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