Formal verification of counterflow pipeline architecture

Author:

Loewenstein Paul N.

Publisher

Springer Berlin Heidelberg

Reference9 articles.

1. David L. Dill, Andreas J. Drexler, Alan J. Hu, and C. Han Yang. Protocol verification as a hardware design aid. In 1992 IEEE International Conference on Computer Design: VLSI in Computers and Processors, pages 522–525. IEEE Computer Society, 1992. Cambridge, MA, October 11–14.

2. Mike Gordon. HOL: A machine oriented formulation of higher-order logic. Technical Report 68, University of Cambridge Computer Laboratory, 1985.

3. Mike Gordon. HOL: A proof generating system for higher-order logic. In G. Birtwistle and P. A. Subrahmanyam, editors, VLSI Specification, Verification and Synthesis. Kluwer Academic Publishers, 1988.

4. Paul Loewenstein. The formal verification of state-machines using higher-order logic. In IEEE International Conference on Computer Design, pages 204–207. IEEE Computer Society Press, 1989.

5. Paul Loewenstein. A formal theory of simulations between infinite automata. Formal Methods in System Design, 3(1/2):117–149, August 1993.

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