Decidability of bisimulation equivalences for parallel timer processes-Reference-Cited by-同舟云学术

Decidability of bisimulation equivalences for parallel timer processes

Published:1993 Issue: Volume: Page:302-315
ISSN:0302-9743
Container-title:Computer Aided Verification
language:
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Author:

Čerāns Kārlis

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-56496-9_24.pdf

Reference18 articles.

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2. R. Alur, C. Courcoubetis and D. Dili, Model-Checking for Real-Time Systems, Proceedings from LICS'90 pp. 414–425, 1990.

3. A. Auziņš, J. Bārzdiņš, J. Bičevskis, K. Čerāns and A. Kalniņš, Automatic Construction of Test Sets: Theoretical Approach, Baltic Computer Science, LNCS, No. 502, 1991.

4. B. Berthomieu and M.Menasche, An Enumerative Approach for Analyzing Time Petri Nets, Proc. IFIP Congress, 1983, North-Holland, 1983.

5. CCITT Specification and Description Language (SDL), Recomendations Z.100, 1988.

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