A high-performance doping-less tunnel FET with pocketed architecture: proposal and analysis
Author:
Funder
UGC
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering,Modeling and Simulation,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s10825-023-02039-3.pdf
Reference23 articles.
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2. Nigam, K., Pandey, S., Kondekar, P.N., Sharma, D., Kumar Parte, P.: A Barrier Controlled Charge Plasma-Based TFET with Gate Engineering for Ambipolar Suppression and RF/Linearity Performance Improvement. IEEE Trans. Electron Devices 64(6), 2751–2757 (2017)
3. Patel, J., et al.: Performance improvement of nano wire TFET by hetero-dielectric and hetero-material: at device and circuit level. Microelectron. J. 85, 72–82 (2019)
4. Avci, U.E., Ian A.Y.: Heterojunction TFET scaling and resonant-TFET for steep subthreshold slope at sub-9nm gate-length. In: 2013 IEEE International Electron Devices Meeting. IEEE, (2013)
5. Raad, B.R., Tirkey, S., Sharma, D., Kondekar, P.: A new design approach of dopingless tunnel FET for enhancement of device characteristics. IEEE Trans. Electron Devices 64(4), 1830–1836 (2017)
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