Towards an Optimal Implementation of MLP in FPGA

Author:

Ortigosa E. M.,Cañas A.,Rodríguez R.,Díaz J.,Mota S.

Publisher

Springer Berlin Heidelberg

Reference11 articles.

1. Lecture Notes in Computer Science;J. Zhu,2003

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3. Gonçalves, R.A., Moraes, P.A.: ARCHITECT-R: A System for Reconfig. Robots Design. In: ACM Symp. on Appl. Comp., pp. 679–683. ACM Press, New York (2003)

4. Hammerstrom, D.: Digital VLSI for Neural Networks. In: Arbib, M. (ed.) The Handbook of Brain Theory and Neural Networks, 2nd edn. MIT Press, Cambridge (2003)

5. Gao, C., Hammerstrom, D., Zhu, S., Butts, M.: FPGA implementation of very large associative memories. In: Omondi, A.R., Rajapakse, J.C. (eds.) FPGA Implementations of Neural Networks. Springer, Heidelberg (2005)

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1. Training of Sparsely Connected MLPs;Lecture Notes in Computer Science;2011

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