SRAM-based FPGAs: A fault model for the configurable logic modules
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Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/BFb0055241
Reference13 articles.
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5. T. Inoue, H. Fujiwara, H. Michinishi, T. Yokohira and T. Okamoto: Universal Test Complexity of Field-Programmable Gate Arrays, 4th Asian Test Symposium, pp. 259–265, Bangalora, November 1995, India.
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Test, diagnosis and fault simulation of embedded RAM modules in SRAM-based FPGAs;Microelectronic Engineering;2007-02
2. An approach to minimize the test configuration for the logic cells of the Xilinx XC4000 FPGAs family;Journal of Electronic Testing;2000
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