Low-Power FIR Filter Design Using Hybrid Artificial Bee Colony Algorithm with Experimental Validation Over FPGA
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s00034-016-0297-4.pdf
Reference42 articles.
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3. T. Arslan, A.P. Erdogan, D.H. Horrocks, Low power design for DSP: methodologies and techniques. Microelectron. J. 27(8), 731–744 (1996)
4. M. Azarmehr, M. Ahmadi, Low-power finite impulse response (FIR) filter design using two-dimensional logarithmic number system (2DLNS) representations. Circuits Syst. Signal Process. 31(6), 2075–2091 (2012)
5. T.S. Bindiya, E. Elias, Modified meta-heuristic algorithms for the optimal design of multiplier-less non-uniform channel filters. Circuits Syst. Signal Process. 33(3), 815–837 (2014)
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