Author:
Tsai Chia-Chun,Wu Jan-Ou,Lee Trong-Yen
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Reference19 articles.
1. 0.35UM Logic Silicide (SPQM, 3.3V) Spice Models, TSMC (1996)
2. T.-C. Chen, S.-R. Pan, Y.-W. Chang, Performance optimization by wire and sizing under the transmission line model, in Proc. of International Conference on Computer Design (September 2001), pp. 23–26
3. T.-C. Chen, S.-R. Pan, Y.-W. Chang, Timing modeling and optimization under the transmission line model. IEEE Trans. VLSI Syst. 12(1) (2004)
4. J. Cong, D.Z. Pan, Interconnect delay estimation models for synthesis and design planning, in Proc. ASP-DAC (1999), pp. 97–100
5. W.C. Elmore, The transient response of damped linear networks. J. Appl. Phys. 19, 55–63 (1948)