High IIP3 and Low-Noise CMOS Mixer Using Non-linear Feedback Technique

Author:

Amirabadi Amir,Chehelcheraghi Mojtaba,Kamarei Mahmoud

Publisher

Springer Science and Business Media LLC

Subject

Applied Mathematics,Signal Processing

Reference22 articles.

1. V. Aparin, L.E. Larson, Linearization of monolithic LNA’s using low-frequency, low-impedance input termination, in Proc. IEEE Eur. Solid State Circuits Conf. (2003), pp. 137–140

2. B. Bakkaloglu, et al., A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90 nm digital CMOS process. IEEE J. Solid-State Circuits 41(5), 1149–1159 (2006)

3. W.-H. Chen, et al., A highly linear broadband CMOS LNA employing noise and distortion cancellation. IEEE J. Solid-State Circuits 43(5), 1164–1176 (2008)

4. H. Darabi, A.A. Abidi, Noise in RF-CMOS mixers: a simple physical model. IEEE J. Solid-State Circuits 35(1), 15–25 (2000)

5. Y. Ding, R. Harjani, An +18 dBm IIP3 LNA in 0.35 μm CMOS, in ISSCC 2001 Dig. Tech. Papers (2001), pp. 162–163

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