A Highly Area-Efficient Switching Scheme based on Charge Sharing and Capacitor Holding for SAR ADCs
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
https://link.springer.com/content/pdf/10.1007/s00034-022-02093-5.pdf
Reference23 articles.
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2. Y. Chen, Y. Zhuang, H. Tang, A 99.8% energy-reduced two-stage mixed switching scheme for SAR ADC without reset energy. Circuits Syst. Signal Process. 38(12), 5426–5447 (2019). https://doi.org/10.1007/s00034-019-01151-9
3. B.P. Ginsburg, A.P. Chandrakasan, An energy-efficient charge recycling approach for a SAR converter with capacitive DAC. IEEE Int. Symp. Circuits Syst 43, 184–187 (2005). https://doi.org/10.1109/ISCAS.2005.146455
4. W. Guo, Z. Zhu, A 0.3 V 8-bit 8.9 fJ/con.-step SAR ADC with sub-DAC merged switching for bio-sensors. Microelectron. J. 68, 44–54 (2017). https://doi.org/10.1016/j.mejo.2017.09.001
5. L. Huang, L. Zhang, M. Chen et al., A low-energy and area-efficient Vaq-based switching scheme with capacitor-splitting structure for SAR ADCs. Circuits Syst. Signal Process. 40, 4106–4126 (2021). https://doi.org/10.1007/s00034-021-01666-0
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1. A 9-10-Bit Adjustable and Energy-Efficient Switching Scheme for Successive Approximation Register Analog-to-Digital Converter with One Least Significant Bit Common-Mode Voltage Variation;Sensors;2024-05-21
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