Modeling and Analysis of a Frequency-Locked Loop Based on Two-Stage Ring Voltage-Controlled Oscillator-Reference-Cited by-同舟云学术

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Modeling and Analysis of a Frequency-Locked Loop Based on Two-Stage Ring Voltage-Controlled Oscillator

Published:2021-04-29 Issue:10 Volume:40 Page:5182-5203
ISSN:0278-081X
Container-title:Circuits, Systems, and Signal Processing
language:en
Short-container-title:Circuits Syst Signal Process

Author:

Wu Jin,Sun Xingsheng,Zhou Mouzhao,Rong Yue,Zheng Lixia^ORCID,Sun Weifeng

Funder

Jiangsu Provincial Natural Science Fund

National Natural Science Foundation of China

Science and Technology on Analog Integrated Circuit Laboratory Fund

Publisher

Springer Science and Business Media LLC

Subject

Applied Mathematics,Signal Processing

Link

https://link.springer.com/content/pdf/10.1007/s00034-021-01694-w.pdf

Reference19 articles.

1. W. Bae, H. Ju, K. Park, S. Cho, D. Jeong, A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOS, in 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC), Xiamen, China (2015), pp. 1–4. https://doi.org/10.1109/ASSCC.2015.7387448

2. H.T. Bui, Y. Savaria, Design of a high-speed differential frequency-to-voltage converter and its application in a 5-GHz frequency-locked loop. IEEE Trans. Circ. Syst. I Regul. Pap. 55(3), 766–774 (2008). https://doi.org/10.1109/TCSI.2008.916397

3. S. Cui, V. Acharya, B. Banerjee, A low-power and wide tuning range frequency locked loop for a Cognitive Radio system, in 2009 IEEE Radio and Wireless Symposium, San Diego, CA, USA (2009), pp. 364-367. https://doi.org/10.1109/RWS.2009.4957356

4. A. Djemouai, M.A. Sawan, M. Slamani, New frequency-locked loop based on CMOS frequency-to-voltage converter: design and implementation. IEEE Trans. Circ. Syst. II Analog Digit. Signal Process. 48(5), 441–449 (2001). https://doi.org/10.1109/82.938354

5. I. Ghorbel, F. Haddad, W. Rahajandraibe, M. Loulou, A subthreshold low-power CMOS LC-VCO with high immunity to PVT variations. Analog Integr. Circ. Signal Process. 93(3), 415–426 (2017). https://doi.org/10.1007/s10470-017-1047-7

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