Implementation of Digital Watermarking Algorithms in Parallel Hardware Accelerators-Reference-Cited by-同舟云学术

Implementation of Digital Watermarking Algorithms in Parallel Hardware Accelerators

Published:2016-10-21 Issue:5 Volume:45 Page:1108-1127
ISSN:0885-7458
Container-title:International Journal of Parallel Programming
language:en
Short-container-title:Int J Parallel Prog

Author:

Głowacz Andrzej,Pietroń Marcin

Funder

University of Science and Technology in Cracow

Publisher

Springer Science and Business Media LLC

Subject

Information Systems,Theoretical Computer Science,Software

Link

http://link.springer.com/article/10.1007/s10766-016-0459-9/fulltext.html

Reference23 articles.

1. Haouzia, A., Noumeir, R.: Methods for image authentication: a survey. Multimedia Tools Appl. 39(1), 1–46 (2008)

2. Fridrich, J.: Methods for tamper detection in digital images. In: Proceedings of the Multimedia and Security Workshop at ACM Multimedia (1999)

3. Wen, C.-Y., Yang, K.-T.: Image authentication for digital image evidence. Forensic Sci. J. (2006)

4. Zhu, B., Tewfik, A.H.: Low bit rate near-transparent image coding. In: Proceedings of SPIE (1995)

5. Fawad, A., Siyal, M.Y.: A secure and robust DCT-based hashing scheme for image authentication. 10th IEEE Singapore International Conference on Communucation Systems (2006)

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