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Parallel Algorithms Development for Programmable Devices with Application from Cryptography

Published:2007-06-21 Issue:6 Volume:35 Page:529-572
ISSN:0885-7458
Container-title:International Journal of Parallel Programming
language:en
Short-container-title:Int J Parallel Prog

Author:

Damaj Issam W.

Publisher

Springer Science and Business Media LLC

Subject

Information Systems,Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/s10766-007-0046-1.pdf

Reference48 articles.

1. Xilinx, Information available from, http://www.xilinx.com

2. Altera, Information available from, http://www.Altera.com

3. Celoxica, Information available from, http://www.celoxica.com

4. S. Stepney, CSP/FDR2 to Handel-C Translation, Tech. Rep. YCS-2002-357, Department of Computer Science, University of York (June 2003).

5. D. Edwards, S. Harris, and J. Forge, High performance hardware from java, Xilinx Whitepaper http://www.xilinx.com

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1. Optimizing FPGA implementation of high-precision chaotic systems for improved performance;PLOS ONE;2024-04-09

2. Formal verification of pipelined cryptographic circuits: A functional approach;Informatica;2021-12-17

3. Parallel hardware for faster morphological analysis;Journal of King Saud University - Computer and Information Sciences;2018-10

4. An analysis framework for hardware and software implementations with applications from cryptography;Computers & Electrical Engineering;2018-07

5. HTCC: Haskell to Handel-C Hardware Compiler;2016 Euromicro Conference on Digital System Design (DSD);2016-08

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