FPL-3E: Towards Language Support for Reconfigurable Packet Processing

Author:

Cristea Mihai Lucian,Zissulescu Claudiu,Deprettere Ed,Bos Herbert

Publisher

Springer Berlin Heidelberg

Reference14 articles.

1. Bos, H., de Bruijn, W., Cristea, M., Nguyen, T., Portokalidis, G.: FFPF: Fairly Fast Packet Filters. In: Proceedings of OSDI 2004, San Francisco, CA (2004)

2. Nguyen, T., de Bruijn, W., Cristea, M., Bos, H.: Scalable network monitors for high-speed links: a bottom-up approach. In: Proceedings of IPOM 2004, Beijing, China (2004)

3. Lockwood, J.W., Neely, C., Zuver, C., Moscola, J., Dharmapurikar, S., Lim, D.: An extensible, system-on-programmable-chip, content-aware Internet firewall. In: Field Programmable Logic and Applications (FPL), Lisbon, Portugal, p. 14B (2003)

4. Kienhuis, B., Rypkema, E., Deprettere, E.: Compaan: Deriving Process Networks from Matlab for Embedded Signal Processing Architectures. In: Proceedings of the 8th International Workshop on Hardware/Software Codesign (CODES), San Diego, USA (2000)

5. Lecture Notes in Computer Science;C. Zissulescu,2003

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