Performance Analysis of Channel and Inner Gate Engineered GAA Nanowire FET

Author:

Ashima ,Vaithiyanathan D.,Raj Balwinder

Publisher

Springer Science and Business Media LLC

Subject

Electronic, Optical and Magnetic Materials

Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Comparative Study of Nanowire FET & Internal Gate Nanowire FET;2024 2nd International Conference on Device Intelligence, Computing and Communication Technologies (DICCT);2024-03-15

2. Numerical Simulation of Hetero Dielectric Trench Gate JAM Gate-All-Around FET (HDTG-JAM-GAAFET) for Label Free Biosensing Applications;ECS Journal of Solid State Science and Technology;2023-12-01

3. Design and optimization of vertical nanowire tunnel FET with electrostatic doping;Engineering Research Express;2023-10-19

4. Linearity Analysis of Charge Plasma-Induced Graded Channel Nanotube at Varying Temperatures;2023 International Conference on Self Sustainable Artificial Intelligence Systems (ICSSAS);2023-10-18

5. Comparative analysis of gate-oxide engineering in charge plasma based nanowire transistor;Engineering Research Express;2023-08-08

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