A Novel LDMOS with Ultralow Specific on-Resistance and Improved Switching Performance-Reference-Cited by-同舟云学术

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A Novel LDMOS with Ultralow Specific on-Resistance and Improved Switching Performance

Published:2021-09-14 Issue: Volume: Page:
ISSN:1876-990X
Container-title:Silicon
language:en
Short-container-title:Silicon

Author:

Wu Lijuan,Wu Haifeng,Zeng Jinsheng,Chen Xing,Su Shaolian

Funder

scientific research fund of hunan provincial education department

hunan provincial key laboratory of flexible electronic materials genome engineering's open fund project-2020

Publisher

Springer Science and Business Media LLC

Subject

Electronic, Optical and Magnetic Materials

Link

https://link.springer.com/content/pdf/10.1007/s12633-021-01351-6.pdf

Reference28 articles.

1. Naka.gawa A (1991) Impact of dielectric isolation technology on power ICs. Proceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs pp 16–21. https://doi.org/10.1109/ISPSD.1991.146056

2. Saxena RS, Kumar MJ (2012) Polysilicon spacer gate technique to reduce gate charge of a trench power MOSFET. IEEE Trans. Electron Devices 59(3):738–744. https://doi.org/10.1109/TED.2011.2176946

3. Hueting RJE, Hijzen EA, Heringa A, Ludikhuize AW, Zandt MAA (2004) Gate-drain charge analysis for switching in power trench MOSFETs. IEEE Trans. Electron Devices 51(8):1323–1330. https://doi.org/10.1109/TED.2004.832096

4. T. Nitta, S. Yanagi, T. Miyajima, K. Furuya, Y. Otsu, H. Onoda, and K. Hatasako (2006) Wide voltage power device implementation in 0.25 μm SOI BiC-DMOS. 2006 IEEE International Symposium on Power Semiconductor Devices and IC's pp 1–4. https://doi.org/10.1109/ISPSD.2006.1666141

5. Baliga BJ (1989) Power semiconductor device figure of merit for high-frequency applications. IEEE Electron Device Lett 10(10):455–457. https://doi.org/10.1109/55.43098

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