A SiGe-Source Doping-Less Double-Gate Tunnel FET: Design and Analysis Based on Charge Plasma Technique with Enhanced Performance
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
http://link.springer.com/content/pdf/10.1007/s12633-021-01030-6.pdf
Reference27 articles.
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3. Mishra V, Kumar Y, Prateek V, Verma K, Kumar S (2018) EMA-based modeling of the surface potential and drain current of dual-material gate-all-around TFETs. J Comput Electron 17(4):1596–1602. https://doi.org/10.1007/s10825-018-1250-5
4. Chen ZX, Yu HY, Singh N, Shen NS, Sayanthan RD, Lo GQ, Kwong DL (2009) Demonstration of tunneling FETs based on highly scalable vertical silicon nanowires. IEEE Electron Device Lett 30(7):754–756. https://doi.org/10.1109/LED.2009.2021079
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