Statistical Modeling of Combinational Circuits Using Path Based Delay Analysis
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
http://link.springer.com/article/10.1007/s12633-017-9721-z/fulltext.html
Reference10 articles.
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2. Jiang L, Wen S, Tai W, Lei W, Chang L, Cheng Y (2014) Device parameter variations of n-MOSFETS with dog-bone layouts in 65 nm and 40 nm technologies. IEEE. https://doi.org/10.1109/ASICON.2013.6812060
3. Tang Q, Zjajo A, Berkelaar M, van der Meijs N (2010) RDE-based transistor-level gate simulation for statistical static timing analysis. In: DAC’10, pp 787–792
4. Tang Q, Zjajo A, Berkelaar M, van der Meijs N (2014) Considering crosstalk effects in statistical timing analysis. IEEE Trans Comput Aided Des Integr Circ Syst 33(2):318–322
5. Kang K, Paul BC, Roy K (2005) Statistical timing analysis using levelized covariance propagation. IEEE Computer Society, pp 1–6
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