Design and Integration of Vertical TFET and Memristor for Better Realization of Logical Functions

Author:

Singh Jeetendra,Singh Shailendra,Paras Neha

Publisher

Springer Science and Business Media LLC

Subject

Electronic, Optical and Magnetic Materials

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Reproducing countless hidden attractors in a memristive system based on offset boosting;The European Physical Journal Plus;2024-02-24

2. Dynamic Power Reduction in dual edge triggered D-Flip-flop clock gating using Memristor;2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS);2024-02-24

3. Organic Frameworks Memristor: An Emerging Candidate for Data Storage, Artificial Synapse, and Neuromorphic Device;Advanced Functional Materials;2024-01-04

4. Design and estimation of GaAsSb/InGaAs hetero-junction double-dual gate vertical tunnel FET (HJ-VTFET) biosensor;Journal of Materials Science: Materials in Electronics;2024-01

5. Offset boosting in a memristive hyperchaotic system;Physica Scripta;2023-12-29

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