GSGP-hardware: instantaneous symbolic regression with an FPGA implementation of geometric semantic genetic programming

Author:

Maldonado Yazmin,Salas Ruben,Quevedo Joel A.,Valdez Rogelio,Trujillo Leonardo

Funder

Tecnológico Nacional de México

Consejo Nacional de Ciencia y Tecnología

Publisher

Springer Science and Business Media LLC

Reference99 articles.

1. S.P.H. Alinodehi, S. Moshfe, M.S. Zaeimian, A. Khoei, K. Hadidi, High-speed general purpose genetic algorithm processor. IEEE Trans. Cybern. 46(7), 1551–1565 (2016)

2. A. Amaricai, O. Boncalo, Srt radix-2 dividers with (5, 4) redundant representation of partial remainder, in 2013 NORCHIP (IEEE, 2013)

3. C. AMD, Vivado design suite, user guide logic simulation (2018). https://docs.amd.com/v/u/2018.3-English/ug900-vivado-logic-simulation

4. C. AMD, Quality and reliability vivado (2023). https://www.xilinx.com/support/quality.html

5. C. AMD, Reliability vivado (2023). https://www.xilinx.com/support/quality/reliability.html

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