Author:
Dolz Manuel F.,Martínez Héctor,Castelló Adrián,Alonso-Jordá Pedro,Quintana-Ortí Enrique S.
Abstract
AbstractWe take a step forward towards developing high-performance codes for the convolution operator, based on the Winograd algorithm, that are easy to customise for general-purpose processor architectures. In our approach, augmenting the portability of the solution is achieved via the introduction of vector instructions from Intel SSE/AVX2/AVX512 and ARM NEON/SVE to exploit the single-instruction multiple-data capabilities of current processors as well as OpenMP pragmas to exploit multi-threaded parallelism. While this comes at the cost of sacrificing a fraction of the computational performance, our experimental results on three distinct processors, with Intel Xeon Skylake, ARM Cortex A57 and Fujitsu A64FX processors, show that the impact is affordable and still renders a Winograd-based solution that is competitive when compared with the lowering gemm-based convolution.
Funder
Agencia Estatal de Investigación,Spain
Conselleria d'Educació, Investigació, Cultura i Esport
Junta de Andalucía
Agencia Estatal de Investigación
Universitat Jaume I
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Information Systems,Theoretical Computer Science,Software
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