Author:
Terzopoulos George,Karatza Helen
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Information Systems,Theoretical Computer Science,Software
Reference24 articles.
1. Benini L, Bogliolo A, Micheli GD (2000) A survey of design techniques for system-level dynamic power management. IEEE Trans Very Large Scale Integr (VLSI) Syst 8(3):299–316
2. Weiser M, Welch B, Demers A, Shenker S (1994) Scheduling for reduced cpu energy. In: USENIX symposium operating systems design and implementation
3. Yao F, Demers A, Shenker S (1995) A scheduling model for reduced CPU energy. In: Proceedings of the 36th annual symposium on foundations of computer science (FOCS ’95). IEEE Computer Society, Washington, p 374
4. Sudha Anil Kumar G, Manimaran G (2005) An intra-task DVS algorithm exploiting path probabilities for real-time systems. SIGBED Rev 2(2):7–10
5. Gheorghita SV, Basten T, Corporaal H (2005) Intra-task scenario-aware voltage scheduling. In: Proceedings of the 2005 international conference on compilers, architectures and synthesis for embedded systems (CASES ’05). ACM Press, New York, pp 177–184
Cited by
10 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献