A prefetch control strategy based on improved hill-climbing method in asymmetric multi-core architecture
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Published:2023-02-11
Issue:10
Volume:79
Page:10570-10588
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ISSN:0920-8542
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Container-title:The Journal of Supercomputing
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language:en
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Short-container-title:J Supercomput
Author:
Fang Juan,Xu Yixiang,Kong Han,Cai Min
Abstract
AbstractCache prefetching is a traditional way to reduce memory access latency. In multi-core systems, aggressive prefetching may harm the system. In the past, prefetching throttling strategies usually set thresholds through certain factors. When the threshold is exceeded, prefetch throttling strategies will control the aggressive prefetcher. However, these strategies usually work well in homogeneous multi-core systems and do not work well in heterogeneous multi-core systems. This paper considers the performance difference between cores under the asymmetric multi-core architecture. Through the improved hill-climbing method, the aggressiveness of prefetching for different cores is controlled, and the IPC of the core is improved. Through experiments, it is found that compared with the previous strategy, the average performance of big core is improved by more than 3%, and the average performance of little cores is improved by more than 24%.
Funder
National Natural Science Foundation of China Beijing Municipal Natural Science Foundation
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Information Systems,Theoretical Computer Science,Software
Reference28 articles.
1. Lowe-Power J, Ahmad AM, Akram A, Alian M, Amslinger R, Andreozzi M, Armejach A, Asmussen N, Bharadwaj S, Black G, Bloom G, Bruce BR, Carvalho DR, Castrillón J, Chen, L, Derumigny N, Diestelhorst S, Elsasser W, Fariborz M, Farahani AF, Fotouhi P, Gambord R, Gandhi J, Gope D, Grass T, Hanindhito B, Hansson A, Haria S, Harris A, Hayes T, Herrera A, Horsnell M, Jafri SAR, Jagtap R, Jang H, Jeyapaul R, Jones TM, Jung M, Kannoth S, Khaleghzadeh H, Kodama Y, Krishna T, Marinelli T, Menard C, Mondelli A, Mück T, Naji O, Nathella K, Nguyen H, Nikoleris N, Olson LE, Orr MS, Pham B, Prieto P, Reddy T, Roelke A, Samani M, Sandberg A, Setoain J, Shingarov B, Sinclair MD, Ta T, Thakur R, Travaglini G, Upton M, Vaish N, Vougioukas I, Wang Z, Wehn N, Weis C, Wood DA, Yoon H, Zulian ÉF (2020) The gem5 simulator: version 20.0+. CoRR arXIv: abs/2007.03152 2. Ebrahimi E, Mutlu O, Chang JL, Patt YN ( 2009) Coordinated control of multiple prefetchers in multi-core systems. In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12–16, 2009, New York, New York, USA 3. Sridharan A, Seznec A, Panda B (2017) Band-pass prefetching: an effective prefetch management mechanism using prefetch-fraction metric in multi-core systems. Acm Trans Archit Code Optim 14:1–27 4. Kim J, Pugsley SH, Gratz PV, Reddy A, Chishti Z (2016) Path confidence based lookahead prefetching. In: IEEE/ACM International Symposium on Microarchitecture 5. Bakhshalipour M, Shakerinava M, Lotfi-Kamran P, Sarbazi-Azad H ( 2019) Bingo spatial data prefetcher. In: 2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)
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