Evaluating the computational performance of the Xilinx Ultrascale+ EG Heterogeneous MPSoC

Author:

Belloch Jose A.ORCID,León Germán,Badía José M.,Lindoso Almudena,San Millan Enrique

Funder

Secretaría de Estado de Investigación, Desarrollo e Innovación

Universitat Jaume I

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Information Systems,Theoretical Computer Science,Software

Reference39 articles.

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2. Avnet Inc, Ultra96-V2 Hardware user guide. Version 1.0, 2019

3. Tumeo A, Ceriani M, Palermo G et al (2017) Real-time considerations for rugged embedded systems, in Rugged Embedded Systems. Morgan Kaufmann, Boston, pp 39–56

4. Berg M, LaBel K, Campola M, Pellish J (2017) NEPP update of independent single event upset field programmable gate array testing, NEPP Electronics Technology Workshop, June 26–29, 2017, Greenbelt, MD, United States. https://ntrs.nasa.gov/search.jsp?R=20170005805

5. Guertin SM (2014) Candidate CubeSat Processors, NASA NEPP EEE Parts for Small Missions Workshop, September 10–11, NASA GSFC, Greenbelt, MD, United States

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