Online energy-efficient fair scheduling for heterogeneous multi-cores considering shared resource contention
Author:
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Information Systems,Theoretical Computer Science,Software
Link
https://link.springer.com/content/pdf/10.1007/s11227-021-04159-8.pdf
Reference30 articles.
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3. Srikantaiah S, Das R, Mishra AK, Das CR, Kandemir M (2009) A case for integrated processor-cache partitioning in chip multiprocessors. In: Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, pp 1–12
4. Delaluz V, Sivasubramaniam A, Kandemir M, Vijaykrishnan N, Irwin MJ (2002) Scheduler-based DRAM energy management. In: Design Automation Conference (DAC), pp 697–702
5. Lukefahr A, Padmanabha S, Das R, Dreslinski Jr R, Wenisch TF, Mahlke S (2014) Heterogeneous microarchitectures trump voltage scaling for low-power cores. In: Parallel architectures and compilation Techniques (PACT), pp 237–250
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