Shorts in self-checking circuits-Reference-Cited by-同舟云学术

Shorts in self-checking circuits

Published:1991-01 Issue:4 Volume:1 Page:257-273
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Nicolaidis M.

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/content/pdf/10.1007/BF00136315.pdf

Reference25 articles.

1. W.C. Carter and P.R. Schneider, ?Design of dynamically checked computers? Proc 4th Congress IFIP, 2, Edinburgh, Scotland, pp. 878?883, August 5?10, 1968.

2. Report R/527;D.A. Anderson,September 1971

3. J.E. Smith and G. Metze, ?Strongly fault-secure logic networks,? IEEE Trans Comput., C-27: 491?499, June 1978.

4. M. Nicolaidis, I. Jansch, and B. Courtois, ?Strongly code disjoint checkers,? Proc. 14th Fault Tolerant Comput. Symp., Kissemmee, FL, pp. 16?21, June 1984.

5. J. Galiay, Y. Crouzet, and M. Vergniault, ?Physical versus logical fault models MOS LSI circuits: impact on their testability,? IEEE Trans. Comput., C-29: 527?531, June 1980.

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