Reliable Parallel Processing
Author:
Publisher
Kluwer Academic Publishers
Link
http://link.springer.com/content/pdf/10.1007/0-306-46964-2_19.pdf
Reference14 articles.
1. Adams, G. B., III, D. P. Agrawal, and H. J. Siegel, “Fault-Tolerant Multistage Interconnection Networks,” IEEE Computer, Vol. 20, No. 6, pp. 14–27, June 1987.
2. Bruck, J., R. Cypher, and C.-T. Ho, “Fault-Tolerant Meshes and Hypercubes with Minimal Numbers of Spares,” IEEE Trans. Computers, Vol. 42, No. 9, pp. 1089–1104, September 1993.
3. Chiu, G.-M., and K.-S. Chen, “Use of Routing Capbility for Fault-Tolerant Routing in Hypercube Multicomputers,” IEEE Trans. Computers, Vol. 46, No. 8, pp. 953–958, August 1997.
4. Ciciani, B., Manufacturing Yield Evaluation of VLSI/WSI Systems, IEEE Computer Society Press, 1995.
5. Dutt, S., and F. T. Assaad, “Mantissa-Preserving Operations and Robust Algorithm-Based Fault Tolerance for Matrix Computations,” IEEE Trans. Computers, Vol. 45, No. 4, pp. 408–424, April 1996.
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