1. Optimizing data reshaping operations in functional IRs for high-level synthesis;Proceedings of the 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems;2022-06-14
2. End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators;IEEE Transactions on Computers;2022
3. On embedding a hardware description language in Isabelle/HOL;Design Automation for Embedded Systems;2019-11-05
4. High-level synthesis of functional patterns with Lift;Proceedings of the 6th ACM SIGPLAN International Workshop on Libraries, Languages and Compilers for Array Programming;2019-06-08
5. Design of an Intelligent Data Cache with Replacement Policy;International Journal of Embedded and Real-Time Communication Systems;2019-04