Author:
Calhoun Benton,Kao James,Chandrakasan Anantha
Publisher
Kluwer Academic Publishers
Reference38 articles.
1. M. Horiguchi, T. Sakata, and K. Itoh, Switched-source-impedence CMOS circuit for low standby sub-threshold current giga-scale LSIs, IEEE Journal of Solid-State Circuits, Vol. 28, No. 11, pp. 1131–1135, November 1993.
2. T. Kawahara, M. Horiguchi, Y. Kawajiri, G. Kitsukawa, and T. Kure, Subthreshold current reduction for decoded-driver by self-reverse biasing, IEEE Journal of Solid-State Circuits, Vol. 28, No. 11, pp. 1136–1144, November 1993.
3. Y. Ye, S. Borkar, and V. De, A new technique for standby leakage reduction in high-performance circuits, 1998 Symposium on VLSI Circuits, pp. 40–41, June 1998.
4. S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, and J. Yamada, IV high-speed digital circuit technology with 0.5μm multi-threshold CMOS, IEEE International ASIC Conference and Exhibit, pp. 186–189, September 1993.
5. J. Kao, S. Narendra, and A. Chandrakasan, Subthreshold leakage modeling and reduction techniques, International Conference on Computer Aided Design, pp. 141–148, November 2002.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献