Author:
Williams Poul F.,Biere Armin,Clarke Edmund M.,Gupta Anubhav
Publisher
Springer Berlin Heidelberg
Reference18 articles.
1. Abdulla, P.A., Bjesse, P., Eén, N.: Symbolic reachability analysis based on SAT solvers. In: Tools and Algorithms for the Analysis and Construction of Systems (TACAS) (2000)
2. Andersen, H.R., Hulgaard, H.: Boolean expression diagrams. Information and Computation (to appear)
3. Andersen, H.R., Hulgaard, H.: Boolean expression diagrams. In: IEEE Symposium on Logic in Computer Science (LICS) (July 1997)
4. Biere, A., Cimatti, A., Clarke, E.M., Fujita, M., Zhu, Y.: Symbolic model checking using SAT procedures instead of BDDs. In: Proc. ACM/IEEE Design Automation Conference, DAC (1999)
5. Lecture Notes in Computer Science;A. Biere,1999
Cited by
32 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Applicability of Model Checking for Verifying Spacecraft Operational Designs;2023 ACM/IEEE 26th International Conference on Model Driven Engineering Languages and Systems (MODELS);2023-10-01
2. Portfolio Management in Explicit Model Checking;Transactions on Petri Nets and Other Models of Concurrency XVI;2022
3. Accelerating temporal verification of Simulink diagrams using satisfiability modulo theories;Software Quality Journal;2014-11-20
4. Quantifier elimination by dependency sequents;Formal Methods in System Design;2014-08-14
5. Summarization of Boolean satisfiability verification;Journal of Electronics (China);2014-06