The Rewrite Rule Machine node architecture and its performance-Reference-Cited by-同舟云学术

The Rewrite Rule Machine node architecture and its performance

Published:1994 Issue: Volume: Page:509-520
ISSN:0302-9743
Container-title:Parallel Processing: CONPAR 94 — VAPP VI
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Author:

Lincoln Patrick,Meseguer José,Ricciulli Livio

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-58430-7_45.pdf

Reference24 articles.

1. H. Aida, J. Goguen, S. Leinwand, P. Lincoln, J. Meseguer, B. Taheri, and T. Winkler. “Simulation and Performance Estimation for the Rewrite Rule Machine”. In Proceedings of the Fourth Symposium on the Frontiers of Massively Parallel Computation, pages 336–344. IEEE, 1992.

2. H. Aida, J. Goguen, and J. Meseguer. “Compiling Concurrent Rewriting onto the Rewrite Rule Machine”. In S. Kaplan and M. Okada, editors, Conditional and Typed Rewriting Systems, Montreal, Canada, June 1990, pages 320–332. Springer LNCS 516,1991.

3. H. Aida, S. Leinwand, and J. Meseguer. “Architectural Design of the Rewrite Rule Machine Ensemble. In J. Delgado-Frias and W.R. Moore, editors, VLSI for Artificial Intelligence and Neural Networks, pages 11–22. Plenum Publ. Co., 1991. Proceedings of an International Workshop held in Oxford, England, September 1990.

4. Davis E., Arnold J., Buell D. “SPLASH-2”. In Proceedings of the ACM Symposium on Parallel Algorithms and Architectures, 1992.

5. K. Batcher. “The Architecture of Tomorrow's Massively Parallel Computer”, In Frontiers of Massively Parallel Scientific Computing, September 1986. NASA CP 2478.

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1. Compiling rewriting onto SIMD and MIMD/SIMD machines;PARLE'94 Parallel Architectures and Languages Europe;1994