Integrating program optimizations and transformations with the scheduling of instruction level parallelism-Reference-Cited by-同舟云学术

Integrating program optimizations and transformations with the scheduling of instruction level parallelism

Published:1997 Issue: Volume: Page:207-221
ISSN:0302-9743
Container-title:Languages and Compilers for Parallel Computing
language:
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Author:

Berson David A.,Chang Pohua,Gupta Rajiv,Soffa Mary Lou

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/BFb0017254

Reference14 articles.

1. D. Berson, R. Gupta and M.L. Soffa, “Resource Spackling: A framework for integrating register allocation in local and global schedulers,” In Proc. of Intl. Conf. on Parallel Architectures and Compilation Techniques, pages 135–146, 1994.

2. D. Berson, R. Gupta and M.L. Soffa, “GURRR: A global unified resource requirements representation,” In ACM SIGPLAN Workshop on Intermediate Representations, Sigplan Notices, vol. 30, pages 23–34, April 1995.

3. P.P. Chang, S.A. Mahlke, and W-M. Hwu, “Using profile information to assist classic code optimizations,” Software-Practice and Experience, 21(12):1301–1321, Dec. 1991.

4. K. Ebcioglu, R.D. Groves, K-C. Kim, G. Silberman, and I. Ziv, “VLIW compilation techniques in a superscalar environment,” In Proc. of Sigplan Conf. on Prog. Language Design and Implementation, pages 36–48, 1994.

5. J.A. Fisher, “Trace scheduling: a technique for global microcode compaction,” IEEE Trans. on Computers, C-30(7):478–490, 1981.

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