Design and implementation of R4-MSD square root algorithm in ternary optical computer-Reference-Cited by-同舟云学术

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Design and implementation of R4-MSD square root algorithm in ternary optical computer

Published:2024-01-06 Issue:9-10 Volume:28 Page:6787-6800
ISSN:1432-7643
Container-title:Soft Computing
language:en
Short-container-title:Soft Comput

Author:

Yunfu Shen^ORCID,Zhehe Wang

Funder

National Natural Science Foundation of China

Hainan Provincial Natural Science Foundation of China

Hainan Provincial Education Department of China

Key Research and Development Project of Hainan Province

Publisher

Springer Science and Business Media LLC

Link

https://link.springer.com/content/pdf/10.1007/s00500-023-09518-6.pdf

Reference29 articles.

1. ANSI/IEEE, Ieee standard for binary floating-point arithmetic. ANSI/IEEE Std 754-1985 pp. 1–20 (1985). https://doi.org/10.1109/IEEESTD.1985.82928

2. Avizienis A (1961) Signed-digit numbe representations for fast parallel arithmetic. IRE Trans Electron Comput EC. 10(3):389–400. https://doi.org/10.1109/TEC.1961.5219227

3. Bashagha AE, Ibrahim MK (1994) Radix digit-serial pipelined divider/square-root architecture. IEE Proceed Comput Digit Tech 141(6):375–380. https://doi.org/10.1049/ip-cdt:19941502

4. Cherri AK, Alam MS (2001) Algorithms for optoelectronic implementation of modified signed-digit division, square-root, logarithmic, and exponential functions. Appl Opt 40(8):1236–1243. https://doi.org/10.1364/AO.40.001236

5. Chu Wanming, Li Yamin (2000) in Proceedings 5th Australasian Computer Architecture Conference. ACAC 2000 (Cat. No.PR00512), pp. 9–16. https://doi.org/10.1109/ACAC.2000.824317

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