1. D. Boning et al., “Developing and Integrating TCAD Applications with the Semiconductor Wafer Representation,” NUPAD IV, IEEE92TH0424–2, May 1992.
2. For information on the TCAD Work Bench contact Sematech in Austin, TX.
3. TCAD tools are available from Technology Modeling Associates, Silvaco, Dawn Technoloies, SIGMA-C, FINLE Technologies, Integrated Systems Engineering, Vector Technologies, and others.
4. W. G. Oldham, S. N. Nandgaonkar, A. R. Neureuther, and M. M. O’Toole, “A General Simulator for VLSI Lithography and Etching Processes: Part I-Application to Projection Lithography,” IEEE Trans. on Electron Devices, Vol. ED-26, No. 4, pp. 717–722 April 1979.
5. K. Lee, Y. Sakai and A.R. Neureuther, “Topography Dependent Step Coverage Resistance Simulation for VLSI Design,” 1982 Symposium on VLSI Technology, Proceedings pp. 61–62, Oiso, Japan, Sept. 1–3, 1982.