Verification of synchronous sequential machines based on symbolic execution-Reference-Cited by-同舟云学术

Verification of synchronous sequential machines based on symbolic execution

Published:1990 Issue: Volume: Page:365-373
ISSN:0302-9743
Container-title:Automatic Verification Methods for Finite State Systems
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Author:

Coudert Olivier,Berthet Christian,Madre Jean Christophe

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-52148-8_30.pdf

Reference14 articles.

1. F. Anceau, "Design Methodology for Large Custom Processors". Proc. of the 1986 ESSIR Conference, Delft.

2. J. R. Armstrong, Chip-Level Modeling with VHDL, Prentice Hall, 1989.

3. J. P. Billon, "Perfect Normal Forms for Discrete Functions", BULL Research Report N o 87019, June 1987.

4. J. P. Billon, J. C. Madre, "Original Concepts of PRIAM, an Industrial Tool for Efficient Formal Verification of Combinational Circuits", in The Fusion of Hardware Design and Verification, G. J. Milne Editor, North Holland, 1988.

5. O. Coudert, J. C. Madre, "Logics over Finite Domain of Interpretation: Proof and Resolution Procedures", BULL Research Report to appear, 1989.

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