Author:
Bilardi G.,Preparata F. P.
Publisher
Springer Berlin Heidelberg
Reference12 articles.
1. R. P. Brent and H.T. Kung, "The chip complexity of binary arithmetic," Journal of the ACM, vol. 28, n. 3, pp. 521–534; July 1981.
2. R. P. Brent and H.T. Kung, "A regular layout for parallel adders," IEEE Trans. Comput. vol. C-31, n. 3, pp. 260–264; March 1982.
3. G. M. Baudet, F. P. Preparata and J.E. Vuillemin, "Area-time optimal VLSI circuits for convolution," IEEE Trans. Comp., vol. C-32, no. 7, pp. 684–688; July 1983.
4. G. Bilardi and F. P. Preparata "The influence of key length on the area-time complexity of sorting," Proc. I.C.A.L.P., Nafplion, Greece (Springer-Verlag) pp. 53–62; July 1985.
5. G. Bilardi and M. Sarrafzadeh, "Optimal discrete Fourier transform in VLSI," International Workshop on Parallel Computing and VLSI, Amalfi, Italy; May 1984.