Minimization of Binary Decision Diagrams by Adaptive Hierarchy Genetic Algorithm and Its Application in Circuit Test Generation
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Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-642-31528-2_29.pdf
Reference10 articles.
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2. Chou, K.C.: BDD-based synthesis for mixed CMOS/PTL logic. International Journal of Circuit Theory and Applications 39(9), 923–932 (2011)
3. Lhotak, O., Curial, S., Amaral, J.N.: An optimal encoding to represent a single set in an ROBDD. IEEE Trans. on Computers 59(4), 574–575 (2010)
4. Ebendt, R., Gunther, W., Drechsler, R.: An improved branch and bound algorithm for exact BDD minimization. IEEE Trans. on CAD 22(12), 1657–1663 (2003)
5. Ebendt, R., Gunther, W.: Combining ordered best-first search with branch and bound for exact BDD minimization. IEEE Trans. on CAD 24(10), 1515–1529 (2005)
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