A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication
Author:
Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-642-12267-5_13
Reference15 articles.
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2. Angiolini, F., Meloni, P., Carta, S., Benini, L., Raffo, L.: Contrasting a NoC and a traditional interconnect fabric with layout awareness. In: Proceedings of Design, Automation and Test in Europe Conference (DATE 2006), Munich, Germany, pp. 124–129 (2006)
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4. Bertozzi, D., Jalabert, A., Murali, S., Tamhankar, R., Stergiou, S., Benini, L., De Micheli, G.: Noc synthesis flow for customized domain specific multiprocessor systems-on-chip. IEEE Trans. Parallel Distrib. Syst. 16(2), 113–129 (2005)
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