Analysis and Design of Charge Pumps for Telecommunication Applications
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Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-642-12267-5_3.pdf
Reference28 articles.
1. Parker, J.F., Ray, D.: A 1.6-GHz CMOS PLL with on-chip loop filter. IEEE Journal of Solid State Circuits 33(3), 337–343 (1998)
2. Craninckx, J., Steyaert, M.S.J.: A fully integrated CMOS DCS-1800 frequency synthesizer. IEEE Journal of Solid-State Circuits 33(12), 2054–2065 (1998)
3. Rhee, W.: Design of high-performance CMOS charge pumps in phase-locked loops. In: IEEE International Symposium on Circuits and Systems (ISCAS), vol. 2, pp. 545–548 (1999)
4. Rategh, H.R., Samavati, H., Lee, T.H.: A CMOS frequency synthesizer with an injection-locked frequency divider for a 5-GHz wireless LAN receiver. IEEE Journal of Solid-State Circuits 35(5), 780–787 (2000)
5. Rhee, W., Song, B.S., Ali, A.: A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order ΔΣ modulator. IEEE Journal of Solid-State Circuits 35(10), 1453–1460 (2000)
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1. Architectures of Charge Pump for Digital Phase Locked Loops;Lecture Notes in Networks and Systems;2017-11-10
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