Publisher
Springer Berlin Heidelberg
Reference8 articles.
1. Akella, J., McMillan, K.L.: Synthesizing converters between finite state protocols. In: Computer Design on VLSI in Computer & Processors, pp. 410–413. IEEE, Los Alamitos (1991)
2. Avnit, K., D’Silva, V., Sowmya, A., Ramesh, S., Parameswaran, S.: A formal approach to the protocol converter problem. In: Proceedings of the conference on Design, automation and test in Europe (DATE 2008), pp. 294–299. ACM, New York (2008)
3. Sinha, R., Roop, P.S., Basu, S.: A model checking approach to protocol conversion. Electr. Notes Theor. Comput. Sci. 203(4), 81–94 (2008)
4. Passerone, R., de Alfaro, L., Henzinger, T., Sangiovanni-Vincentelli, A.: Convertibility verification and converter synthesis: two faces of the same coin. In: International Conference on Computer Aided Design, November 2002, pp. 132–139 (2002)
5. Clarke, E.M., Grumberg, O., Peled, D.A.: Model Checking. MIT Press, Cambridge (2000)
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