Microvisor: A Runtime Architecture for Thermal Management in Chip Multiprocessors-Reference-Cited by-同舟云学术

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Microvisor: A Runtime Architecture for Thermal Management in Chip Multiprocessors

Published:2011 Issue: Volume: Page:84-110
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
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Author:

Khan Omer,Kundu Sandip

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-24568-8_5

Reference38 articles.

1. Advanced Configuration and Power Interface (ACPI), http://www.acpi.info/spec.html

2. Naffziger, S., et al.: Power and Temperature Control on a 90nm Itanium®-Family Processor. In: Int’l Solid State Circuit Conf. (2005)

3. Revision Guide for AMD NPT Family 0Fh Processors, AMD Publication # 33610 (October 2006)

4. International Roadmap for Semiconductor (ITRS), Document available at http://www.public.itrs.net/

5. Sanchez, H., et al.: Thermal System Management for high performance PowerPC microprocessors. In: COMPCON (1997)

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