Efficient FPGA Implementation of Montgomery Multiplier Using DSP Blocks
Author:
Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-642-31494-0_47.pdf
Reference2 articles.
1. Huang, G., El-Ghazawi: New Hardware Architectures for Montgomery Modular Multiplication Algorithm. IEEE Transactions on Computers, 923–936 (2011)
2. Montgomery, P.: Modular multiplication without trial division. Mathematics of Computation 44(170), 519–521 (1985)
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