Advances in Simultaneous Multithreading Testcase Generation Methods-Reference-Cited by-同舟云学术

Advances in Simultaneous Multithreading Testcase Generation Methods

Published:2011 Issue: Volume: Page:146-160
ISSN:0302-9743
Container-title:Hardware and Software: Verification and Testing
language:
Short-container-title:

Author:

Ludden John M.,Rimon Michal,Hickerson Bryan G.,Adir Allon

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-19583-9_15

Reference13 articles.

1. Sinharoy, B., Kalla, R.N., Tendler, J.M., Eickemeyer, R.J., Joyner, J.B.: POWER5 system microarchitecture

2. Le, H.Q., Starke, W.J., Fields, J.S., O’Connell, F.P., Nguyen, D.Q., Ronchetti, B.J., Schwarz, W.M., Vaden, M.T.: IBM POWER6 microarchitecture. IBM Journal of Research & Development 51(6) (November 2007)

3. Burns, D.: Pre-Silicon Validation of Hyper-Threading technology. Intel Technology Journal, 16-21 (February 2002)

4. Kumar, J.: UltraSPARC Processor Emulation Verification: Getting HW/SW right the first time. DesignCon (2007), http://www.cdnusers.org/community/incisive/vtp_designcon2007_JaiKumar.pdf

5. EE-Times: POWER7, http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=219400955J

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