Temporal Partitioning Algorithm for Dynamically Reconfigurable Computing Systems
Author:
Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-642-25327-0_38
Reference12 articles.
1. Bobda: Introduction to Reconfigurable Computing Architectures, Algorithms, and Applications. Springer Publishers, Heidelberg (2007)
2. Cardoso, J.M.P.: On Combining Temporal Partitioning and Sharing of Functional Units in Compilation for Reconfigurable Architectures. IEEE Trans. Computers 52(10) (2003)
3. Jiang, Y.-C., Lai, Y.-T.: Temporal partitioning data flow graphs for dynamically reconfigurable computing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15(12) (December 2007)
4. Liu, H., Wong, D.F.: Network flow based circuit partitioning for time-multiplexed FPGAs. In: Proc. IEEE/ACM Int. Conf. Comput.- Aided Des., pp. 497–504 (1998)
5. Liu, H., Wong, D.F.: Network flow based multi-way partitioning with area and pin constraints. IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems 17(1) (January 1998)
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