Publisher
Springer Berlin Heidelberg
Reference35 articles.
1. S. Wimoesterer, VDSL2. Funkschau, Heft 17/2005 (2005), pp. 43–44
2. R. Schreier, G. Temes, Understanding Delta-Sigma Data Converters (Wiley, Hoboken, New Jersey, 2004). ISBN:0-471-46585-2
3. R. Adams, K.Q. Nguyen, K. Sweetland, A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling. IEEE J. Solid-State Circ. 33(12), 1871–1878 (1998)
4. G. Van Der Plas, J. Vandenbussche, W. Sansen, M. Steyaert, G. Gielen, A 14-bit intrinsic accuracy Q
2 random walk CMOS DAC. IEEE J. Solid-State Circ. 34(12), 1708–1718 (1999)
5. R. Baird, T. Fiez, Improved
$$\Delta \Sigma $$
DAC linearity using data weighted averaging, in Proceedings of the 1995 International Symposium on Circuits and Systems, vol. 1, pp. I–13 – I–16, 1995