Author:
Paulino Nuno,Ferreira João Canas,Cardoso João M. P.
Publisher
Springer Berlin Heidelberg
Reference12 articles.
1. Wolf, W.: A decade of hardware/software codesign. Computer 36, 38–43 (2003)
2. Clark, N., Blome, J., Chu, M., Mahlke, S., Biles, S., Flautner, K.: An architecture framework for transparent instruction set customization in embedded processors. In: Proc. of the 32nd Annual Intl. Symposium on Computer Arch. (ISCA 2005), pp. 272–283. IEEE Computer Society, Washington, DC (May 2005)
3. Paek, J.K., Choi, K., Lee, J.: Binary acceleration using coarse-grained reconfigurable architecture. SIGARCH Comput. Archit. News 38(4), 33–39 (2011)
4. Lysecky, R.L., Vahid, F.: Design and implementation of a microblaze-based warp processor. ACM Trans. Embedded Comput. Syst. 8(3), 22:1–22:22 (2009)
5. Noori, H., Mehdipour, F., Murakami, K., Inoue, K., Saheb Zamani, M.: An architecture framework for an adaptive extensible processor. J. Supercomput. 45(3), 313–340 (2008)
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