The Research of Efficient Dual-Port SRAM Data Exchange without Waiting with FIFO-Based Cache

Author:

Qianqian Alfred Ji,Ping Zhao,Sen Cheng,Jingjing Tan,Xu Wei,Yong Wei

Publisher

Springer Berlin Heidelberg

Reference8 articles.

1. Li, J., Conan, J., Pierre, S.: Mobile Station Location Estimation for MIMO Communication Systems. In: 3rd International Symposium on Wireless Communication Systems 2006, ISWCS 2006, pp. 561–563 (2006)

2. Liu, L., Nagaraj, P., Upadhyaya, S., Sridhar, R.: Defect Analysis and Defect Tolerant Design of Multi-port SRAMs. Journal of Electronic Testing: Theory and Applications (JETTA) 24(1-3), 165–179 (2008)

3. Noguchi, H., Okumura, S., Iguchi, Y., Fujiwara, H., Morita, Y., Nii, K., Kawaguchi, H., Yoshimoto, M.: Which is the Best Dual-port SRAM in 45-nm Process Technology? -8T, 10T Single End, and 10T Differential. In: Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT, pp. 55–58 (2008)

4. Yang, H.-I., Chang, M.-H., Lin, T.-J., Ou, S.-H., Deng, S.-S., Liu, C.-W., Hwang, W.: A Controllable Low-Power Dual-Port Embedded SRAM for DSP Processor. In: Records of the IEEE International Workshop on Memory Technology, Design and Testing, pp. 27–30 (2007)

5. Li, F.: Fairness Analysis in Competitive FIFO Buffer Management. In: Conference Proceedings of the IEEE International Performance, Computing, and Communications Conference, pp. 239–246 (2008)

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