Optimization-Based Design of Nano-CMOS LC-VCOs-Reference-Cited by-同舟云学术

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Optimization-Based Design of Nano-CMOS LC-VCOs

Published:2012 Issue: Volume: Page:453-464
ISSN:1868-4238
Container-title:Technological Innovation for Value Creation
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Author:

Pereira Pedro,Fino Helena,Coito Fernando V.,Ventim-Neves M.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-28255-3_50

Reference23 articles.

1. Maricau, E., Gielen, G.: Computer-Aided Analog Circuit Design for Reliability in Nanometer CMOS. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1, 50–58 (2011)

2. Ghai, D., Mohanty, S., Kougianos, E.: Design of Parasitic and Process-Variation Aware Nano-CMOS RF Circuits: A VCO Case Study. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17, 1339–1342 (2009)

3. Ghai, D., Mohanty, S., Kougianos, E.: Parasitic Aware Process Variation Tolerant Voltage Controlled Oscillator (VCO) Design. In: 9th International Symposium on Quality Electronic Design (ISQED), pp. 330–333 (2008)

4. Garitselov, O., Mohanty, S., Kougianos, E.: Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling. In: 12th International Symposium on Quality Electronic Design (ISQED), pp. 1–6 (2011)

5. Murakami, R., Hara, S., Okada, K., Matsuzawa, A.: Design optimization of voltage controlled oscillators in consideration of parasitic capacitance. In: 52nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2009, pp. 1010–1013 (2009)

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. LC-VCO Design Challenges in the Nano-Era;Analog/RF and Mixed-Signal Circuit Systematic Design;2013

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