1. Ampalam, M., Singh, M.: Counterflow pipelining: architectural support for preemption in asynchronous systems using anti-tokens. In: Proc. CAD 2006 (2006)
2. Bardsley, A., Edwards, D.: The Balsa asynchronous circuit synthesis system. In: Forum on Design Languages (2000)
3. Clarke, E.M., Grumberg, O., Peled, D.A.: Model Checking. MIT Press, Cambridge (1999)
4. Cortadella, J., Kishinevsky, M., Kondratyev, A., Lavagno, L., Yakovlev, A.: Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Trans. Inf. and Syst. E80-D(3), 315–325 (1997)
5. Golubcovs, S., Mokhov, A., Yakovlev, A.: Multi-resource Arbiter Design. In: Proc. 20th UK Asynchronous Forum (2008)